simd — Plan 9 kernels

github.com/openfluke/welvet/simd✅

Why it exists

CPU peak needs hand-written AVX2/NEON without a silent Go fallback that pretends SIMD ran.

What it is

amd64/arm64 .s kernels: DotTile, DotI8/U8, DotQ4_0, Saxpy, BitNet helpers, packed f16/bf16/fp8/fp4 dots; amd64 AVX2 DotTileF64 (WireF64); Go fused DotKRow / DotIQRow / DotAffineRow for k/IQ/Affine. SimdEnabled() false → BackendSIMD hard-errors.

v1.0.3: Dense FormatNone forward finished the remaining Plan 9 wires — DotTileF64 (amd64), BF16 convert, expand-once → DotTile. Backward still uses saxpy/DecodeRow paths. Universal sizes (any in/out/batch).

Arm still runs every FormatNone dtype through the right Dense strategy; the f64 wire is scalar until a NEON DotTileF64 lands. Hot traffic (f32 / i8) already has NEON.

package main

import (
	"fmt"

	"github.com/openfluke/welvet/simd"
)

func main() {
	if !simd.SimdEnabled() {
		fmt.Println("SIMD not available on this arch — BackendSIMD must hard-error")
		return
	}
	acc := simd.DotTile([]float32{1, 2, 3, 4}, []float32{1, 1, 1, 1}, 0, 4, 0)
	fmt.Println(acc)
}

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